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標題: [硬件] [討論] 有關CPUID [打印本頁]

作者: trentcys 時間: 2005-8-3 00:44 標題: [討論] 有關CPUID

CPU入面嘅cpuid係hardwired定係(出廠前)programmed?

睇Intel d CPU, Pentium同Celeron係share CPUID (except medocino), 似係hardwire
AMD K7 Barton同Thornton係同一CPUID, K8系列A64同Sempron又好似唔同, 唔通係2種核心?

作者: qcmadness 時間: 2005-8-3 00:47

引用:

Originally posted by trentcys at 2005-8-3 00:44:
CPU入面?騃puid係hardwired定係(出廠前)programmed?

睇Intel d CPU, Pentium同Celeron係share CPUID (except medocino), 似係hardwire
AMD K7 Barton同Thornton係同一CPUID, K8系列A64同Sempron又好似唔 ...

K8 Sempron好似有自己分開既core

作者: trentcys 時間: 2005-8-3 00:58

事關係我一連同4粒0.25um P2拆殼 (300*2, 333, 350)

當中只有一粒333嘅core chip係"正常"0.25um大細

http://www.tomshardware.com/cpu/19980503/slot1-02.html

而其餘3粒core chip個金屬蓋都同Slot 1 Celeron-128K一樣大

http://www.anandtech.com/showdoc.html?i=277

懷疑Intel係為左方便生產Medocino而將Deschutes嘅封裝一齊改埋, 定有部份Destuchutes P2係奄左嘅Medocino

作者: trentcys 時間: 2005-8-3 01:00

引用:

Originally posted by qcmadness at 2005-8-3 00:47:

K8 Sempron好似有自己分開既core

原來真係咁~

作者: qcmadness 時間: 2005-8-3 01:00

呢d我就唔知啦

不過奄割係intel / amd既一貫技倆

作者: trentcys 時間: 2005-8-3 01:05

引用:

Originally posted by qcmadness at 2005-8-3 01:00:
呢d我就唔知啦

不過奄割係intel / amd既一貫技倆

就係Deschutes同Medocino嘅CPUID唔同

仲有粒冇鎖頻嘅P2 333 (5.5ns L2

)超搞笑, 一超上133MHz FSB就會冇左L2 cache變做covington

PS: 人地拆嘅Deschutes都係細金屬殼...

HardOcp:

http://www.hardocp.com/article.html?art=MjE1

Japanese website

http://web01.fureai.or.jp/~hirobo/analysis/mecanical.html

[ Last edited by trentcys on 2005-8-3 at 01:07 ]

作者: qcmadness 時間: 2005-8-3 01:07

引用:

Originally posted by trentcys at 2005-8-3 01:05:

就係Deschutes同Medocino?韔PUID唔同
仲有粒冇鎖頻?餲2 333 (5.5ns L2:hitwall)超搞笑, 一超上133MHz FSB就會冇左L2 cache變做covington

PS: 人地拆?韱eschutes都係細金屬殼 ...

奇景

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