Originally posted by 真.飛鳥 at 2008-3-11 19:38:
我無野講 , 16MB L3 Share Cache , 人地AMD搞咁耐都仲係得個吉 , 家陣Intel搞掂
Originally posted by qcmadness at 2008-3-11 19:53:
呢d唔會賣得平
隨時同Itanium一樣天價
Originally posted by 真.飛鳥 at 2008-3-11 20:20:
暫時定位係Xeon路線
但無形係給AMD好大壓力 , 你睇下K10
Originally posted by qcmadness at 2008-3-11 20:21:
咁既transistor count, 又係照鏡die
p.s. 16MB L3 cache => 16x8x6x1048576=805M => ~200mm^2 (45nm)
Originally posted by 真.飛鳥 at 2008-3-11 20:26:
Share L3 Cache 喎
Originally posted by qcmadness at 2008-3-11 20:27:
單係L3 cache就200mm^2
Core Arch的core w/o cache都要50mm^2 per core啦
仲有cross-bar / FSB interface呢
加加埋埋夠照鏡
Originally posted by bebe2803 at 2008-3-11 22:57:
唔知我公司 d 客 會唔會出左之後 入部黎玩下
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