Board logo

標題: [業界消息] AMD and Synopsys Expand IP Partnership [打印本頁]

作者: Puff    時間: 2014-9-19 11:48     標題: AMD and Synopsys Expand IP Partnership

http://finance.yahoo.com/news/amd-synopsys-expand-ip-partnership-210000396.html


唔知係咪叫好事

[ 本帖最後由 Puff 於 2014-9-19 11:50 編輯 ]
作者: qcmadness    時間: 2014-9-20 14:07

點會係壞事?
作者: Puff    時間: 2014-9-20 14:33

引用:
原帖由 qcmadness 於 2014-9-20 14:07 發表
點會係壞事?
interface, cell lib 同 analong 轉晒做用 synopsys IP 喎。話得 interface,估計所有同 serdes 有關係既 (pcie/ht/sata/usb) 都會轉晒過檔。另外同製程相關果堆 cell lib/analog 都轉鬼晒去 synopsys,專心做架構/high-level IP/SOC 設計咁既款。

雖然話 synopsys 都係 leading-edge,「自家野」有時聽落總係覺得好 D。



[ 本帖最後由 Puff 於 2014-9-20 14:36 編輯 ]
作者: qcmadness    時間: 2014-9-20 15:07

引用:
原帖由 Puff 於 2014-9-20 14:33 發表

interface, cell lib 同 analong 轉晒做用 synopsys IP 喎。話得 interface,估計所有同 serdes 有關係既 (pcie/ht/sata/usb) 都會轉晒過檔。另外同製程相關果堆 cell lib/analog 都轉鬼晒去 synopsys,專心做架構/high ...
佢話可以交換, 唔一定用喎
同埋睇落係幫AMD做automation, 而唔係outsource automation
作者: Puff    時間: 2014-9-20 19:26

引用:
原帖由 qcmadness 於 2014-9-20 15:07 發表

佢話可以交換, 唔一定用喎
同埋睇落係幫AMD做automation, 而唔係outsource automation
引用:
to focus our internal teams on designing the innovative 64-bit processor, graphics and peripheral IP that forms the foundation for our competitive differentiation, while leveraging Synopsys, the industry leader for cost-effective development of complementary standard IP components, for our future SoCs
[ 本帖最後由 Puff 於 2014-9-20 19:32 編輯 ]
作者: qcmadness    時間: 2014-9-20 19:30

引用:
原帖由 Puff 於 2014-9-20 19:26 發表

AMD的SATA同USB都唔係特別好

不過佢話"complementary standard IP components", 講真真係唔知包括咩
作者: Puff    時間: 2014-9-20 19:35

引用:
原帖由 qcmadness 於 2014-9-20 19:30 發表

AMD的SATA同USB都唔係特別好

不過佢話"complementary standard IP components", 講真真係唔知包括咩
what AMD licensed it seems. cell libs and analog IP. the press release has touched a bit on this.
作者: qcmadness    時間: 2014-9-20 19:40

引用:
原帖由 Puff 於 2014-9-20 19:35 發表

what AMD licensed it seems. cell libs and analog IP
我睇完佢portfolio之後, AMD似係想要mobile storage controller, ethernet controller同埋FinFET library
作者: Puff    時間: 2014-9-20 19:53

引用:
原帖由 qcmadness 於 2014-9-20 19:40 發表

我睇完佢portfolio之後, AMD似係想要mobile storage controller, ethernet controller同埋FinFET library
the most important among all are logic libraries and analog IP. every soc needs them. if AMD get rid of ("transfer") the R&D of these two, it means AMD would have even less engineers working directly close to the gates of mgft processes. maybe just the process-specific custom marcos. :/

sorry for using Eng as I'm typing on phone

作者: qcmadness    時間: 2014-9-20 19:56

引用:
原帖由 Puff 於 2014-9-20 19:53 發表

the most important among all are logic libraries and analog IP. every soc needs them. if AMD get rid of ("transfer") the R&D of these two, it means AMD would have even less engineers working directly ...
呢類core logic, 其實AMD唔會用最新的process做
你望下Hudson / Bolton都只係65nm就知

咁睇法, 可能AMD唔太滿意Jaguar的I/O
作者: Puff    時間: 2014-9-20 21:24

引用:
原帖由 qcmadness 於 2014-9-20 19:56 發表

呢類core logic, 其實AMD唔會用最新的process做
你望下Hudson / Bolton都只係65nm就知

咁睇法, 可能AMD唔太滿意Jaguar的I/O
唔單只係 I/O,講緊全粒 chip 用既 standard cell library 呀 SRAM 呀 PLL... 佢話 license 埋 logic lib/memory compiler on 14/10nm FinFET 嘛,仲要轉移埋自己果份俾 synopsys 兼成 team R&D 轉過去。

當然亦我可能係我諗多左。但份 press 似係咁既意思


[ 本帖最後由 Puff 於 2014-9-20 22:55 編輯 ]
作者: qcmadness    時間: 2014-9-20 22:57

引用:
原帖由 Puff 於 2014-9-20 21:24 發表

唔單只係 I/O,講緊全粒 chip 用既 standard cell library 呀 SRAM 呀 PLL... 佢話 license 埋 logic lib/memory compiler on 14/10nm FinFET 嘛,仲要轉移埋自己果份俾 synopsys 兼成 team R&D 轉過去。

當然亦我可能 ...
你應該諗多左




歡迎光臨 HKSpot (https://bbs.hk-spot.com/) Powered by Discuz! 6.0 Lite