引用:
原帖由 Puff 於 2012-5-30 20:51 發表 
If... if Bulldozer and his followings are indeed modular, perhaps AMD will deliver two variants of cores? One for APU with smaller, more responsive caches (perhaps a 8-way 256KB cache..., and please ...
you can save 20% of die size with 1MB shared L2 cache
