qcmadness

8 port? i don't think intel can keep the die size down...

qcmadness

http://www.anandtech.com/show/62 ... rformance-estimates

On-die VRAM up to 128MB

qcmadness

引用:

原帖由 Puff 於 2012-9-13 20:24 發表

The die size is relatively small for Lady Ivy - GT2/4C variant measured 170 mm^2, according to Intel.
GT2/4C variants will not grow too much, perhaps somewhere between 200 mm^2 and 220 mm^2. And GT3  ...

IVB 4C variant is more than 170mm^2, probably ~190mm^2

qcmadness

http://www.xbitlabs.com/articles ... ll-uarch-idf_4.html

Caching Improvements

qcmadness

引用:

原帖由 Puff 於 2012-9-15 19:24 發表

http://www.anandtech.com/show/58 ... vy-bridge-die-sizes

But still 6-issue to 8-issue > 10% die size increase
GPU improvement > 15%+ die size increase

qcmadness

引用:

原帖由 Puff 於 2012-9-15 23:13 發表

I wouldn't say exactly 10% die size increase, but the height of the chip should increase as the cores are larger.
I do my estimation in this way.

the change in gpu will raise core size by more than 15%

qcmadness

引用:

原帖由 Puff 於 2012-9-15 23:17 發表

GT2 is with only 20 EUs. 4 more as compared to Ivy
8*20 to 12*20 is already a big jump for the extra 4 EUs and larger cores.

it is a fair estimation that intel will make 4c/40eu and 2c/20eu masks