qcmadness

http://www.anandtech.com/cpuchipsets/showdoc.aspx?i=2748

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Compared to the excellent AMD K8/Hammer architecture, the Core CPU is simply a wider, more efficient and more out of order CPU. When I suggested to Jack Doweck that the massive execution resources may not be fully used until SMT is applied, he disagreed completely. Memory disambiguation should push the current limits of ILP in integer loads a lot higher, and the massive bandwidth that the L1 and L2 can deliver should help Core to come close to the execution utilization percentages of the current P-M. 33% more execution potential could thus come very close to 33% more performance, clock-for-clock.

So is it game over for AMD? Well, if you read the previous pages, it is pretty clear that there are some obvious improvements that should happen in AMD\'s next generation. However, there is no reason at all to assume that the current K8 architecture is at the end of its life. One obvious upgrade possibility is to enhance the SSE/SIMD power by increasing the wideness of each unit or by simply implementing more of them in the out of order FP pipeline.

qcmadness

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Originally posted by 真．飛鳥 at 2006-5-1 20:09:
唔係好明

簡單來講, Core Architecture既IPC (Instruction per Clock)係高過K8 series.
不過K8都有可以改善的地方.

qcmadness

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Originally posted by 真．飛鳥 at 2006-5-1 20:11:

佢加我又加!?

qcmadness

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Originally posted by 真．飛鳥 at 2006-5-1 20:54:

超

你估話加就加咩

K8 series仲有優點架

qcmadness

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Originally posted by 真．飛鳥 at 2006-5-1 21:01:

等 K8L  ...

K8L加d乜先?

qcmadness

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Originally posted by 真．飛鳥 at 2006-5-1 21:11:
AMD 差唔多完全無講過 K8L 咁濟 ... 所以家陣係網上睇到 ge 資料信住佢 30% 好

一係玩潛水, 一係就一野ko你

想當年K8 arm arm出, 冇人會信佢咁勁