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原帖由 qcmadness 於 2015/1/27 04:00 發表 Performance唔同
原帖由 q_p 於 2015/1/30 00:25 發表 唔明做乜連個L2/ROP/MC 都慳, is faulty L2 cache common in the manufacturing process? and in fact is it that the ROP is faulty so the L2 has to be disabled since it cannot be utilized?