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[硬件] From XS

From XS

http://www.xtremesystems.org/for ... wfull=1#post5237132
引用:
Things that you would like to have are quite different to what can actually technically be done.

- Steamroller supports only up to 3 compute (6 cores) units.
- TDP for a six core Steamroller with same clocks as 7850K would be 125W MINIMUM.
- The die size would be massive, around 290 sq .mm (expensive & low yields).
- Incompatible with most of the current FM2+ motherboards (power infra), unofficial compability could be had on high-end boards (ASUS Pro, ROG & Gigabyte UP4 boards).

Only ARM (Seattle), Orochi, Kabini and Mullins based dies support up to 8 cores by the design.
Two Orochi dies can be installed on the same package (G34 / G2012) allowing the core count to increase to 16.
Komodo supported up to 10 cores per node by the design.

All of the current APU designs support only up to 4 (Trinity / Richland) or 6 (Kaveri) cores.
Multiple dies per package is not possible as there are no internal links (HT) available for the cross-node communication as there is on Orochi or Komodo.
Neither is multiple packages (MCM) for the same reason.

Excavator will probably increase the supported number of cores...
However without a much better manufacturing process I can't see them really turning into flesh.
A 8 core Excavator made on the current 28nm BULK would pretty much mean clocks similar to Mullins (up to 2.2GHz base).
Not because of the process is not capable for higher but simply because of the TDP.

Excavator is and has to be (unfortunately) compatible with the current FM2+ motherboards and therefore the infrastructure itself is limited to 95W max.
In fact AMD has already confirmed that Excavator will be up to 65W, which effectively means it has only up to 4 cores and they are operating at even lower clocks than the Steamroller cores in Kaveri does.

Unless of course AMD has a functional (= low risk) <20nm high-performance manufacturing process in their disposal to be used on Carrizo.
And that's not going to happen in the given schedule

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唔係 SR 支援最多 3M,而係 SR 呢個 generation 嘅 APU NB IP 最多支援 3M


[ 本帖最後由 Puff 於 2014-8-19 21:24 編輯 ]

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算啦, 我都換 Intel 了
天然系長髮眼鏡娘 最高
Lucky Star 聯盟 - 美幸
Kancolle - 大淀, 翔鶴 (太太), 烏海 , 瑞鶴

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AMD Chipset Outsource 埋 比ASMedia 整 .....
AMD 你不如淨係賣 IP , R&D 學當年 ATI 咁算吧啦
天然系長髮眼鏡娘 最高
Lucky Star 聯盟 - 美幸
Kancolle - 大淀, 翔鶴 (太太), 烏海 , 瑞鶴

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引用:
原帖由 dom 於 2014-8-20 17:29 發表
算啦, 我都換 Intel 了
Thank you

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