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Originally posted by BeleBala at 2005-12-25 17:03: Sempron History 都夠打死人
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Originally posted by qcmadness at 2005-12-25 17:03: post去邊?
Originally posted by BeleBala at 2005-12-25 17:04: Of coz eTech, 特允吹水部屋有轉載權只限我寫既
Originally posted by BeleBala at 2005-12-25 17:05: 死...前排先睇完 K7 同 K8 有咩分別, 唔記得晒添
Originally posted by qcmadness at 2005-12-25 17:06: FSB => HTT SOI Int. Mem. Controller 64-bit extension
XT
路人 — 真.飛鳥
Originally posted by BeleBala at 2005-12-25 17:09: 仲有架 K7 理論上係可以有 8M L2 Cache ( chisin ) K8 理論上會減到去 1M L2 Cache, 所以我地永遠都唔會見到有 K8 CPU 擁有 2M L2 Cache, 如果要再加 Cache, AMD 會加 L3 Cache
Originally posted by 真.飛鳥 at 2005-12-25 17:10: L3
Originally posted by qcmadness at 2005-12-25 17:11: 呢個反而唔重要.....
Originally posted by BeleBala at 2005-12-25 17:10: 其實 HTT 有咩好?
Originally posted by BeleBala at 2005-12-25 17:11: 睇見 K7 咁既樣, 你唔係 expect 真係會有 L3 Cache 既 K8 出現嘛
Originally posted by 真.飛鳥 at 2005-12-25 17:13: 不過平民用 cpu 好似仲未有含 L3 ge CPU 喎